| Samsung Electronics today announced that it has developed the industry’s first 40-nanometer (nm) memory device. The new 32 Gigabit (Gb) NAND flash device is the first memory to incorporate a Charge Trap Flash (CTF) architecture, a revolutionary new approach to further increase manufacturing efficiency while greatly improving performance.|
The new CTF-based NAND flash memory increases the reliability of the memory by sharply reducing inter-cell noise levels. Its surprisingly simple structure also enables higher scalability which will eventually improve manufacturing process technology from 40 nm to 30 and even 20nm.
In each 32Gb device, the control gate in the CTF is only 20 percent as large as a conventional control gate in a typical floating gate structure. With CTF, there is no floating gate. Instead, the data is temporarily placed in a “holding chamber” of the non-conductive layer of the flash memory composed of silicon nitride (SiN). This results in a higher level of reliability and better control of the storage current.
The CTF design is enabled through the use of a TANOS structure comprised of tantalum (metal), aluminum oxide (high k material), nitride, oxide and silicon. The use of a TANOS structure marks the first application of a metal layer coupled with a high k material to the NAND device.
Related News: 8-Gigabit NAND Flash Memory from Samsung (24 July, 2006)